Tom Walsh wrote:
> David Williams wrote:
>> Tom Walsh wrote:
>> > Bobby_Lai@acer.com.tw wrote:
>> >> As I know, uClinux (linux-2.0.38) verion seems not implement
>> >> UART hardware flow control for 68EZ328.
>> >> Does someone implemented it ??
>> >> Can I get the patch from somewhere ?
>> >> Or .. beside of specification of 68EZ328 user's manul,
>> >> where can I get the program guide for UART hardware flow control
>> >> for uClinux ?
>> >> Thank you very much!
>> >> Bobby Lai.
>> >> This message resent by the email@example.com list server
>> >> http://www.uClinux.com/
>> > Flow control is a function of the hardware UART, check the users
>> > manual for the 68EZ328 and look over the section dealing with the
>> > for the programming details. There is no software intervention
>> > necessary to implement RTS / CTS flow.
>> > TomW
>> Only partially true. If CTS is enabled then the UART will manage
>> for you stopping transmission whenever CTS is negated (HIGH).
>> However to
>> get RTS to control flow in to the UART you must manage this
>> yourself in
>> software. Ie when buffer gets close to full RTS must be negated
>> Remember that the levels mentioned here are at the microprocessor
>> the RS-232 level are inverted (and magnified).
>> Dave Williams.
>> This message resent by the firstname.lastname@example.org list server
> I respectfully beg to differ, the manual plainly states in Section
> 11.1.3 under RTS that this is can be a hardware function. I have
> proven this to myself by sending bytes to the RS232 receiver and
> monitoring the state of the RTS pin, it will negate when the receiver
> becomes nearly full (decoding final fourth fifo byte), when bytes are
> removed, it re-asserts RTS. This function is disabled by default and
> must be programmed on to enable the automatic negation of RTS.
Well spotted Tom - I was wrong :-( Care should be taken when using this
function as it toggles RTS when the FIFO (12 bytes) has only one slot
remaing - not any interrupt filled buffer (arbitrary size). If your
serial receive interrupt was to simply not remove bytes from the FIFO
when your internal buffer is full then UART control of RTS should be
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